By Andy The
More than a decade ago, every high-volume customer wanted to create a custom ASIC (SOC) device. An ASIC design could provide a processing core and peripherals that were unique to the application. This sounded great, but in practice designing an ASIC involved much more time, effort and expense than most customers could stomach.
ASIC design cycles are extremely long, lasting about 2 years from initial design to availability of the first device. This meant that customers had to select the mix of peripherals and CPUs perfectly, or else they could fail to meet market requirements. To complicate matters further, once a design started, any major changes essentially reset the clock on the 2-year design cycle.
ASIC designs were also incredibly expensive and process-node advancements caused cost increases every year. A typical ASIC design could easily cost in the millions of dollars, and therefore only the largest volume opportunities could hope to recoup the initial engineering costs. Unfortunately many production volumes fell far short of the original projections, causing the customer to lose a great deal money in the end.
Recently Xilinx released a product family called Zync that could be the ASIC solution many customers have been waiting for. The Zync devices contain both an ARM processor and an FPGA. This combination forms a very powerful union, providing the software programmability of an ARM, plus the configurability, speed and flexibility of an FPGA. Customers can create a custom ASIC by configuring the FPGA into whatever peripherals or co-processors the application requires, without having to spend millions on ASIC design costs. Also, the ARM core enables the customer to use standard tooling to develop the UI and control software.
Here is an EETimes piece that talks about the ZYNC processor family and the key features of the device.
The ARM vendor market place is getting more competitive every day – great news for consumer as the competition will continue to drive down costs.