DSP Microcontroller Algorithm Development Features

October 29th, 2018 by

Though most microcontrollers operate on a high frequency clock of up to 20MHz, they do not always execute instruction in one cycle. For instance, some RISC microcontrollers use pipelining but they require a number of cycle to completely execute one instruction cycle. This instruction cycle speed is required to determine the million instructions per second (MIPS) processor power.

This is because, timing is an important peripheral interfacing factor since most peripherals operate at a lower speed as compared to processors. However, some DSP processors like Analog device processors feature automatic wait state interface insertions with low running peripherals; a feature that microcontrollers lack. Therefore, microcontroller wait states must be implemented by developers within the software. Other timing aspects that must be considered include; subroutine call latency and interrupt latency. These aspects are important in determining how algorithms should be implemented on microcontrollers and whether subroutine calls or macros should be utilizes.


Multiplication is a common operation among digital signal processing applications but most microcontrollers lack a multiply instructions apart from the ones with added DSP capabilities. In such a scenario, multiplication requirements are emulated in software. However, this restricts the microcontrollers’ scope among applications that require low processing power in regards to number of multiply accumulate operations. But, multiplication operations for particular applications can be optimized in increase processing power indirectly.

Most microcontrollers also lack the divide instruction; hence, a divide instruction must be emulated in the software. But, this move can bar an implementation from meeting timing requirements set by the target application. To avoid this, it is advisable to eliminate numerous divides and where division is required, the divide routine should be optimized similarly to the multiply routine.

Digital signal processing applications also feature repeated execution of code sections. Most DSP processors offer hardware looping that eliminates overhead associated with updating loop indexes and pipeline flushes that are associated with branching. Microcontrollers on the other hand do not offer such features. However, they offer special control instructions like branching on a bit change that are used to reduce looping overheads. In addition, these special control instructions play an important role in implementation of program flow control.


Though there are numerous microcontroller variations, they have common features that sometimes require DSP capabilities to implement instructions optimally. The features described above are required on processors that are used for algorithm implementation.


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